Top Tech Jobs & Startup Jobs in Austin, TX

The ASIC Verification Engineer will develop and automate verification test plans, ensuring code coverage and collaborating with teams on design verification processes. This role requires strong analytical and debugging skills with experience in RTL verification methodologies.

Designs hardware features for future GPU and parallel-processing architectures, develops graphics and parallel algorithms, and builds simulators, testing infrastructure, metrics systems, and validation tools. Collaborates with architects and researchers across RTL, software models, and real silicon. Requires advanced computer, electrical, or computer engineering education, 8+ years of GPU or CPU architecture experience, strong C, C++, Perl, and Python skills, and expertise in computer architecture, graphics, parallel processing, signal processing, or high-performance computing.

Develop and optimize deep learning compiler infrastructure for high-performance inference across GPUs, data centers, devices, automotive, and robotics. Responsibilities include analyzing neural networks, creating compiler optimization algorithms, defining APIs, improving performance and memory efficiency, implementing compiler techniques, and collaborating with software framework and hardware architecture teams. The role also involves software design, debugging, performance analysis, testing, and independently leading development efforts.

Lead CPU performance architecture for AI, HPC, cloud, gaming, virtual reality, and autonomous-vehicle workloads. Responsibilities include workload bring-up, silicon and simulator performance analysis, benchmarking, bottleneck debugging across multicore and multisocket CPU/GPU systems, directed test development, and collaboration with CPU and interconnect architects to improve future designs.

Develop signal and power integrity solutions for complex system designs. Model and optimize vias, connectors, sockets, breakouts, packages, and PCBs using electromagnetic tools. Perform high-speed interface simulations, post-layout extraction, lab measurement correlation, and simulation automation. Create SI guidelines and analyze package, substrate, board, ASIC, and mixed-signal systems using tools such as HFSS, SIWAVE, MATLAB, JMP, and Python.

Lead the architecture and development of communication libraries and collective algorithms for large-scale distributed deep learning and HPC. Define technical roadmaps, optimize communication across heterogeneous interconnects, co-design hardware and software, partner with AI framework developers, and build analytical models for trillion-parameter models and agentic AI workloads. The role requires deep expertise in parallelism, GPU architecture, CUDA, networking, inference systems, and high-performance computing.

Develop full-system CPU/GPU functional models and integrate them with RTL simulators, emulators, hardware-in-the-loop, and performance models. Bring up firmware, Linux, drivers, benchmarks, and AI/HPC workloads in simulation environments. Extend system software for workload simulation and support CPU architects and performance engineers in advancing next-generation CPU architectures.

Develop and improve NVIDIA’s proprietary GPU compiler backend in C++. Design register allocation passes and compiler optimizations for high-performance GPU machine instructions. Collaborate with compiler, hardware, and application teams on improvements and issue resolution. The role spans deep-learning compiler technology and requires strong compiler code-generation experience, preferably with LLVM, plus robust software engineering, testing, and documentation skills.

Leads the research agenda and architectural direction for large-scale AI communication systems across GPUs, DPUs, NICs, and storage. Conducts original research in RDMA, NVLink, and GPUDirect; drives hardware-software co-optimization; integrates networking into AI serving frameworks; publishes findings; influences industry standards; and mentors senior engineers. The role requires translating systems research into production-grade software and defining complex cross-team technical initiatives.

The Senior LLVM Compiler Engineer will contribute to upstream LLVM development, lead design discussions, and ensure high-quality compiler solutions in collaboration with open-source communities.