Top Tech Jobs & Startup Jobs in Austin, TX

As a Front End Design Engineering Intern, you will support the Logic Design Team for Xtensa processors, working on digital design and verification. You will apply your knowledge of computer architecture and design fundamentals.

Lead Front End Design projects, mentor a team of RTL design engineers, develop microarchitectures, and oversee verification activities in the semiconductor industry.

The Sr. Account Technology Executive drives the growth of Cadence's Verification solutions, manages pre/post-sales activities, and fosters customer relationships.

The Software Intern will develop DFT/ATPG tools in C/C++, setup deployment scripts, and work within a team to create scalable software solutions.

The Lead Mixed-Signal Verification Engineer defines verification plans and solutions for mixed-signal products, drives innovation, and mentors junior engineers.

Intern will work on Design For Test (DFT) and Automatic Test Pattern Generation (ATPG) software by developing tools in C/C++ and deploying scripts.

Develop reliable, scalable software tools for DFT/ATPG, enhancing efficiency in software architecture and algorithms as part of a team.

Lead the execution and management of verification projects, ensuring comprehensive test coverage for CPU cores or processor blocks through diverse technical tasks.

The RTL design engineer will handle feature specification, documentation, and implementation, followed by bug fixes and coordination with validation and physical design teams for product closure.

Cadence is offering a 16-week paid returnship for Physical Design Application Engineers to update skills and re-enter the workforce after caregiving. Candidates will work with EDA tools on Digital Synthesis, Place and Route, and Signoff Analysis.