Top Tech Jobs & Startup Jobs in Austin, TX

Design-for-Test (DFT) engineer responsible for scan chain and compression insertion, MBIST/LBIST, ATPG pattern generation and verification, debugging failures, verifying ATPG testbenches, and collaborating across architecture, design, and customer teams. Work with JTAG/IEEE test standards and Cadence flows to meet test coverage and quality metrics.

Serve as a technical pre-sales leader, driving cross-functional campaigns that match Cadence digital design and EDA solutions to customer needs. Build relationships with customer engineering and leadership, influence buying decisions, manage complex technical projects, and support multi-million-dollar sales through technical expertise across the RTL-to-GDSII flow and AI/ML optimization methods.

Lead development of scalable EDA flows and AI/LLM-driven automation for 3DIC, interposer, and RDL systems. Build flow-generation, debugging assistants, root-cause analysis, and platform integration using C++, Tcl, Python, and Java. Collaborate across teams to define requirements, validate behavior, and deliver production-quality, automated workflows improving usability and debug efficiency for complex package and system-level designs.

Lead Front End Design projects, mentoring RTL engineers, define IP features, write and optimize RTL code, oversee pre-silicon verification, and collaborate with cross-functional teams.

The DevOps Sr Principal Software Engineer will lead infrastructure evolution, implement core systems, collaborate with R&D, and ensure system health and compliance.

Develop and optimize a deep learning compiler stack (using LLVM/MLIR) that lowers neural networks from frameworks (PyTorch/TensorFlow/Caffe) to efficient code for embedded/special-purpose platforms, implement NN operation kernels, create optimization and scheduling strategies for multicore/DSP/accelerators, benchmark performance, and collaborate with hardware designers and partners.

Develop a deep-learning compiler stack that converts neural network descriptions into optimized code for embedded and special-purpose platforms. Implement and optimize NN operations, use LLVM/MLIR, benchmark on DSPs/accelerators, devise multiprocessor partitioning/scheduling, validate runtimes, and collaborate with hardware designers and partners.