Top Tech Jobs & Startup Jobs in Austin, TX

Build and operate Arm’s production AI platform infrastructure, including MCP servers, model gateways, runtime services, and control-plane components. Develop scalable, secure, observable, and cost-aware platform patterns using Kubernetes, cloud infrastructure, infrastructure as code, and GitOps. Responsibilities include automation, monitoring, incident response, reliability engineering, secrets and identity management, network controls, auditability, lifecycle management, and participation in an on-call rotation.

This role focuses on enhancing developer experience through improved tools and solutions, collaborating with developers and engineering teams, and managing product roadmaps for performance tooling.

Coordinate third-party IP delivery and lifecycle management across semiconductor programs. Track vendor commitments, procurement readiness, schedules, risks, dependencies, and recovery plans. Partner with engineering, procurement, quality, legal, finance, program management, and suppliers to resolve blockers and support leadership reporting. Improve IP lifecycle processes, reporting tools, and workflows while ensuring delivery and compliance readiness.

Develop and operate software infrastructure supporting Arm CPU design and verification. Build automation for distributed HPC workloads, CI and regression systems, observability, source-control and verification-tool integrations. Diagnose complex issues across software, hardware verification, operating systems, compute, and storage. Improve compute utilization, verification throughput, failure analysis, and engineering workflows while delivering maintainable production-quality software.

The Senior/Staff Design Verification Engineer will be responsible for design verification in coherent interconnects. Specific responsibilities are not detailed, but expertise in this area is expected.

Provides independent quality oversight for CPU development across requirements, design, verification, release, and maintenance. Leads quality reviews, defect investigations, root-cause analysis, corrective actions, and errata resolution. Uses quality data and customer feedback to identify trends, improve verification effectiveness, strengthen engineering practices, and simplify development processes. Collaborates with engineering teams and contributes to review boards and cross-team improvement initiatives.

Lead product strategy and lifecycle for Physical IP and CPU products targeting Edge AI. Define roadmaps, translate market and customer insights into engineering requirements, drive competitive positioning, and engage Tier 1 customers to secure design wins. Collaborate cross-functionally with engineering, sales, marketing, and executives to influence CPU roadmap, deliver commercial cases, and ensure customer success.

Leads pre-silicon quality engineering for high-speed I/O subsystems including DDR, PCIe, eUSB, and SerDes. Drives DFX metric closure, validates silicon-to-simulation correlation, analyzes eye diagrams, BER, margining, and BIST data, and develops test automation and visualization scripts. Chairs TPIP councils and collaborates with vendors, architects, integration, validation, package, and SIPI teams to ensure quality across upcoming systems-on-chip.

Develop and maintain SystemVerilog/UVM verification environments for Memory Controller IP. Create verification plans, tests, assertions, coverage models, and scoreboards for LPDDR and DDR technologies. Analyze regressions, simulations, waveforms, and logs to debug RTL, testbench, and protocol issues. Collaborate with architects, RTL designers, and verification teams to achieve coverage closure and sign-off, while improving automation and verification workflows.

Architects high-speed I/O and coherent or non-coherent interconnect subsystems for scalable Arm-based SoCs. Defines PCIe, CXL, and UA Link architectures, roadmaps, specifications, and customer solutions. Collaborates with SoC, performance, power, physical design, software, and firmware teams to optimize bandwidth, latency, efficiency, and system integration. Leads workload analysis and performance modeling while influencing cross-functional and executive stakeholders across mobile, automotive, datacenter, networking, and IoT markets.