Top Tech Jobs & Startup Jobs in Austin, TX

YesterdaySaved
In-Office
River Hills, Austin, TX, USA
122K-195K Annually
Senior level
122K-195K Annually
Senior level
Software • Semiconductor • Manufacturing
Design and deliver high-performance flip-chip BGA ASIC packages addressing signal integrity, power integrity, thermal, reliability, and manufacturability. Perform physical layout, manage multiple projects, interface with customers and vendors, and improve design processes and automation.
Top Skills: Adc/DacAllegro Package DesignerCadence ApdCadence SkillDdr5Flip-Chip BgaHbmSerdes (224G+)
Reposted YesterdaySaved
In-Office
River Hills, Austin, TX, USA
108K-192K Annually
Senior level
108K-192K Annually
Senior level
Software • Semiconductor • Manufacturing
Develop and simulate Serdes architecture, document requirements, implement DSP algorithms, collaborate with teams, and support customer interaction.
Top Skills: C/C++Communication TheoryDsp AlgorithmsMatlab
3 Days AgoSaved
In-Office
River Hills, Austin, TX, USA
122K-195K Annually
Senior level
122K-195K Annually
Senior level
Software • Semiconductor • Manufacturing
Design and verify front-end RTL blocks for ASIC cores: define architecture, implement logic, perform synthesis, constraints, simulation and formal verification, analyze timing from physical implementation, debug Verilog designs, and collaborate across global teams within the full ASIC implementation flow.
Top Skills: Asic Implementation FlowCadence ConformalCadence Rtl CompilerDft/Scan MethodologyGitLiberty (Lib) Timing ModelsPerlPower AnalysisRtl SimulationSpyglassSvnSynopsys Design CompilerSynopsys FormalitySynopsys PrimetimeSynthesisTclTiming AnalysisVerilog
Reposted 4 Days AgoSaved
In-Office
River Hills, Austin, TX, USA
52-83 Hourly
Senior level
52-83 Hourly
Senior level
Software • Semiconductor • Manufacturing
Responsible for front end design and verification of ASIC design blocks, including architecture definition, logic design, synthesis, and verification through simulation and analysis of timing.
Top Skills: Cadence ConformalCadence Rtl CompilerGitPerlPrimetimeSpyglass LintSvnSynopsys Design CompilerSynopsys FormalityTclVerilog
Reposted 9 Days AgoSaved
In-Office
River Hills, Austin, TX, USA
141K-226K Annually
Senior level
141K-226K Annually
Senior level
Software • Semiconductor • Manufacturing
The role involves designing flip-chip-BGA packages for ASICs, collaborating on designs, managing projects, and improving processes.
Top Skills: Allegro Package DesignerCadence ApdCadence SkillDesign Automation
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Reposted 9 Days AgoSaved
In-Office
River Hills, Austin, TX, USA
129K-207K Annually
Senior level
129K-207K Annually
Senior level
Software • Semiconductor • Manufacturing
Perform DFT tasks including MBIST and scan insertion, ATPG and pattern simulation, ATE pattern development and silicon debugging, yield analysis, and cross-functional DFT collaboration during design and silicon bring-up.
Top Skills: Ate Pattern DevelopmentAtpgMbistMentor TessentPerlScan CompressionScan InsertionSta Constraint DevelopmentSynopsys Dft Tools
Reposted 15 Days AgoSaved
In-Office
River Hills, Austin, TX, USA
107K-190K Annually
Senior level
107K-190K Annually
Senior level
Software • Semiconductor • Manufacturing
Serve as a bridge between engineering and customers, solving complex issues through innovative solutions, mentoring, and evangelism in the Kubernetes ecosystem.
Top Skills: ArgocdBashFluxGitopsGrafanaHelmJaegerKubernetesOpentelemetryPrometheusPythonTerraform
Reposted 20 Days AgoSaved
In-Office
River Hills, Austin, TX, USA
141K-226K Annually
Expert/Leader
141K-226K Annually
Expert/Leader
Software • Semiconductor • Manufacturing
Develop system software for converged appliance platforms, implement enhancements, full stack development, and provide operational support. Collaborate with teams and improve system performance through test-driven development and CI pipelines.
Top Skills: Ci PipelinesGoJavaPythonRest Apis
Reposted 20 Days AgoSaved
In-Office
River Hills, Austin, TX, USA
108K-173K Annually
Senior level
108K-173K Annually
Senior level
Software • Semiconductor • Manufacturing
Design and develop Ethernet, PCIe PHY low-level drivers, conduct code reviews, test APIs, and maintain software development lifecycle. Engage with customer applications and enhance product features.
Top Skills: CC++LinuxMacsecPcieSerdes IpsVxworks
Reposted 20 Days AgoSaved
In-Office
River Hills, Austin, TX, USA
127K-226K Annually
Expert/Leader
127K-226K Annually
Expert/Leader
Software • Semiconductor • Manufacturing
Lead design and implementation of an AI Virtualization Stack for ESXi, integrating PyTorch/JAX backends via OpenXLA. Optimize ML acceleration (LLM inference, KV-caching, FlashAttention), troubleshoot GPU/XPU runtime issues, collaborate with driver/device teams and vendors, and deliver production-quality code and documentation.
Top Skills: C++CudaEsxiFlashattentionGitGpuJaxKv-CachingMl Compiler TechnologiesOpenxlaPythonPyTorchRocmTritonVllmXpu
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